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ARD2
1.00 for Rev B. Hardware
Airbag Reference Demonstrator using MPC5604P
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00001 00018 #ifndef _CG147_H 00019 #define _CG147_H 00020 /* 00021 ************************************************************** 00022 * Defines, Macros and Typedefs 00023 **************************************************************/ 00024 /*** Constant Macros ***/ 00025 /* Default Yes and No defines */ 00026 #ifndef TRUE 00027 #define TRUE (1u) 00028 #endif 00029 #ifndef CLEAR 00030 #define CLEAR (0u) 00031 #endif 00032 #ifndef BITS_IN_NIBBLE 00033 #define BITS_IN_NIBBLE (4u) 00034 #endif 00035 #ifndef BITS_IN_16 00036 #define BITS_IN_16 (16u) 00037 #endif 00038 #ifndef BITS_IN_BYTE 00039 #define BITS_IN_BYTE (8u) 00040 #endif 00041 #ifndef BYTES_IN_16 00042 #define BYTES_IN_16 (2u) 00043 #endif 00044 #ifndef BYTES_IN_32 00045 #define BYTES_IN_32 (4u) 00046 #endif 00047 00048 #ifndef BIT_DEFINITION 00049 #define BIT_DEFINITION 00050 #define BIT0 (1u << 0u) 00051 #define BIT1 (1u << 1u) 00052 #define BIT2 (1u << 2u) 00053 #define BIT3 (1u << 3u) 00054 #define BIT4 (1u << 4u) 00055 #define BIT5 (1u << 5u) 00056 #define BIT6 (1u << 6u) 00057 #define BIT7 (1u << 7u) 00058 #define BIT8 (1u << 8u) 00059 #define BIT9 (1u << 9u) 00060 #define BIT10 (1u << 10) 00061 #define BIT11 (1u << 11) 00062 #define BIT12 (1u << 12) 00063 #define BIT13 (1u << 13) 00064 #define BIT14 (1u << 14) 00065 #define BIT15 (1u << 15) 00066 #define BIT16 (1u << 16) 00067 #define BIT17 (1u << 17) 00068 #define BIT18 (1u << 18) 00069 #define BIT19 (1u << 19) 00070 #define BIT20 (1u << 20) 00071 #define BIT21 (1u << 21) 00072 #define BIT22 (1u << 22) 00073 #define BIT23 (1u << 23) 00074 #define BIT24 (1u << 24) 00075 #define BIT25 (1u << 25) 00076 #define BIT26 (1u << 26) 00077 #define BIT27 (1u << 27) 00078 #define BIT28 (1u << 28) 00079 #define BIT29 (1u << 29) 00080 #define BIT30 (1u << 30) 00081 #define BIT31 (1u << 31) 00082 #endif 00083 00084 /* Masks for SPI input data */ 00085 #define CG147_TRANSFER_FAILURE_FLAG ((uint16_t)BIT15) 00086 #define CG147_TEST_ACTIVE_FLAG ((uint16_t)BIT14) 00087 #define CG147_END_OF_PROGRAMMING_FLAG ((uint16_t)BIT13) 00088 00089 #define CG147_AD_BUSY_FLAG ((uint16_t)BIT11) 00090 #define CG147_WATCHDOG_FAULT_FLAG ((uint16_t)BIT10) 00091 #define CG147_DISPOSAL_FLAG_1 ((uint16_t)BIT9) 00092 #define CG147_DISPOSAL_FLAG_2 ((uint16_t)BIT8) 00093 /* Number of ADC samples to be but in an array (think test) */ 00094 /* Almost 2 msec of data @ 17usec per sample */ 00095 #define CG147_N_ADC_DATA ((uint16_t)20) 00096 00097 /* Extended Format */ 00098 #define CG147_SAFETY_ID2 ((uint16_t)BIT12) 00099 #define CG147_SAFETY_ID1 ((uint16_t)BIT11) 00100 #define CG147_SAFETY_ID0 ((uint16_t)BIT10) 00101 00102 /* CG147 Valid GENERAL instructions */ 00103 #define SBC_READ_DEV_ID ((uint8_t)0x01u) 00104 #define SBC_READ_REV_ID ((uint8_t)0x07u) 00105 #define SBC_READ_MON_ID ((uint8_t)0x02u) 00106 #define SBC_WD2_TRIGGER ((uint8_t)0x08u) 00107 #define SBC_WD3_TRIGGER ((uint8_t)0x0Bu) 00108 #define SBC_READ_WD_STATUS ((uint8_t)0x04u) 00109 #define SBC_READ_WD_FC ((uint8_t)0x0Eu) 00110 #define SBC_EOP ((uint8_t)0x0Du) 00111 #define SBC_PSI_SUPPLY ((uint8_t)0x10u) 00112 #define SBC_FLM_STATUS ((uint8_t)0x13u) 00113 #define SBC_END_ENABLE ((uint8_t)0x15u) 00114 #define SBC_SET_I_AIO ((uint8_t)0x16u) 00115 #define SBC_READ_THRES ((uint8_t)0x19u) 00116 #define SBC_SET_I_LIN ((uint8_t)0x1Au) 00117 #define SBC_START_ADC ((uint8_t)0x1Cu) 00118 #define SBC_READ_ADC ((uint8_t)0x1Fu) 00119 #define SBC_TEST_ANA_HEAD ((uint8_t)0x20u) 00120 #define SBC_POWER_CTRL ((uint8_t)0x23u) 00121 #define SBC_POWER_STATUS ((uint8_t)0x25u) 00122 #define SBC_AOUT_CTRL ((uint8_t)0x26u) 00123 #define SBC_HS_ON1_4 ((uint8_t)0x29u) 00124 #define SBC_HS_ON5_8 ((uint8_t)0x2Au) 00125 #define SBC_HS_ON9_12 ((uint8_t)0x2Cu) 00126 #define SBC_FLM_TEST_SRC ((uint8_t)0x2Fu) 00127 #define SBC_LS_ON1_4 ((uint8_t)0x31u) 00128 #define SBC_LS_ON5_8 ((uint8_t)0x32u) 00129 #define SBC_LS_ON9_12 ((uint8_t)0x34u) 00130 #define SBC_FLM_TEST_SINK ((uint8_t)0x37u) 00131 #define SBC_FLM_LOCK ((uint8_t)0x3Bu) 00132 #define SBC_LOWLEAK ((uint8_t)0x3Du) 00133 #define SBC_FIRE_COUNTER ((uint8_t)0x3Eu) 00134 #define SBC_READ_PSI ((uint8_t)0x80u) 00135 #define SBC_SELECT_PSI ((uint8_t)0xC2u) 00136 #define SBC_DISPOSAL ((uint8_t)0xC4u) 00137 #define SBC_SET_AIO_PWM ((uint8_t)0xFEu) 00138 #define SBC_DEMAND_TEST ((uint8_t)0x38u) 00139 #define SBC_THRES_TEST_DATA ((uint8_t)0xC8u) 00140 #define SBC_THRES_TEST_SID ((uint8_t)0xCBu) 00141 #define SBC_ENABLE_PROG ((uint8_t)0xCDu) 00142 #define SBC_SET_MM5_MODE ((uint8_t)0xCEu) 00143 #define SBC_PSI_SYNC_GEN ((uint8_t)0xF2u) 00144 #define SBC_PSI_SYNC_MASK ((uint8_t)0xF4u) 00145 #define SBC_AIO_STATUS ((uint8_t)0xF8u) 00146 #define SBC_SET_PSI_IPP ((uint8_t)0xDAu) 00147 #define SBC_READ_PSI_IPP ((uint8_t)0xD3u) 00148 #define SBC_PSI_IQ_STATUS ((uint8_t)0xD5u) 00149 #define SBC_CLEAR_FIRE_CNT ((uint8_t)0xD6u) 00150 #define SBC_SID_EVALUATE ((uint8_t)0xD9u) 00151 #define SBC_TEST_PSI_CONS ((uint8_t)0xDCu) 00152 00153 /* CG147 Valid PROGRAMMING instructions */ 00154 #define SBC_PROG_GENERAL ((uint8_t)0x40u) 00155 #define SBC_PROG_UP_THRES ((uint8_t)0x43u) 00156 #define SBC_PROG_LOW_THRES ((uint8_t)0x45u) 00157 #define SBC_PROG_AIN1_2 ((uint8_t)0x49u) 00158 #define SBC_PROG_AIN3_4 ((uint8_t)0x4Au) 00159 #define SBC_PROG_AIN5_6 ((uint8_t)0x4Cu) 00160 #define SBC_PROG_AIO_WL ((uint8_t)0x79u) 00161 #define SBC_PROG_PSI1_LINE ((uint8_t)0x4Fu) 00162 #define SBC_PROG_PSI2_LINE ((uint8_t)0x51u) 00163 #define SBC_PROG_PSI3_LINE ((uint8_t)0x52u) 00164 #define SBC_PROG_PSI4_LINE ((uint8_t)0x54u) 00165 #define SBC_PROG_UFS_THRES ((uint8_t)0x57u) 00166 #define SBC_PROG_PAS_THRES ((uint8_t)0x58u) 00167 #define SBC_PROG_PRES_THRES ((uint8_t)0x5Bu) 00168 #define SBC_PROG_ROLL_THRES ((uint8_t)0x5Du) 00169 #define SBC_PROG_X_THRES ((uint8_t)0x5Eu) 00170 #define SBC_PROG_Y_THRES ((uint8_t)0x61u) 00171 #define SBC_PROG_POWER ((uint8_t)0x62u) 00172 #define SBC_PROG_FLM_ENH ((uint8_t)0x64u) 00173 #define SBC_PROG_SDIS1_4 ((uint8_t)0x67u) 00174 #define SBC_PROG_SDIS5_8 ((uint8_t)0x68u) 00175 #define SBC_PROG_SDIS9_12 ((uint8_t)0x6Bu) 00176 #define SBC_PROG_DISXY1_4 ((uint8_t)0x6Du) 00177 #define SBC_PROG_DISXY5_8 ((uint8_t)0x6Eu) 00178 #define SBC_PROG_DISXY9_12 ((uint8_t)0x70u) 00179 #define SBC_PROG_FLM_CONF ((uint8_t)0x73u) 00180 #define SBC_PROG_PSYNC_MODE ((uint8_t)0x75u) 00181 #define SBC_PROG_SDIS_CH ((uint8_t)0x7Au) 00182 #define SBC_PROG_PSI_SID ((uint8_t)0x76u) 00183 #define SBC_PROG_MM5_SID ((uint8_t)0x7Fu) 00184 #define SBC_PROG_ENH_SAFETY ((uint8_t)0x46u) 00185 00186 /* AOUT Channels */ 00187 #define SBC_AOUT_VSTT33_DIV_2 ((uint8_t)0x00u) 00188 #define SBC_AOUT_VSTT50_DIV_2 ((uint8_t)0x01u) 00189 #define SBC_AOUT_TEMP_DIODE ((uint8_t)0x02u) 00190 #define SBC_AOUT_VAS_SET ((uint8_t)0x03u) 00191 #define SBC_AOUT_AGND ((uint8_t)0x04u) 00192 #define SBC_AOUT_SQREF ((uint8_t)0x05u) 00193 #define SBC_AOUT_AVST33 ((uint8_t)0x06u) 00194 #define SBC_AOUT_VSYNC_DIV_8 ((uint8_t)0x07u) 00195 #define SBC_AOUT_PSI1_DIV_6 ((uint8_t)0x08u) 00196 #define SBC_AOUT_PSI2_DIV_6 ((uint8_t)0x09u) 00197 #define SBC_AOUT_PSI3_DIV_6 ((uint8_t)0x0Au) 00198 #define SBC_AOUT_PSI4_DIV_6 ((uint8_t)0x0Bu) 00199 #define SBC_AOUT_VDN_DIV_146 ((uint8_t)0x0Du) 00200 #define SBC_AOUT_IGH1 ((uint8_t)0x10u) 00201 #define SBC_AOUT_IGH2 ((uint8_t)0x11u) 00202 #define SBC_AOUT_IGH3 ((uint8_t)0x12u) 00203 #define SBC_AOUT_IGH4 ((uint8_t)0x13u) 00204 #define SBC_AOUT_IGL1 ((uint8_t)0x14u) 00205 #define SBC_AOUT_IGL2 ((uint8_t)0x15u) 00206 #define SBC_AOUT_IGL3 ((uint8_t)0x16u) 00207 #define SBC_AOUT_IGL4 ((uint8_t)0x17u) 00208 #define SBC_AOUT_ER1_DIV_10 ((uint8_t)0x18u) 00209 #define SBC_AOUT_ER2_DIV_10 ((uint8_t)0x19u) 00210 #define SBC_AOUT_IGH5 ((uint8_t)0x20u) 00211 #define SBC_AOUT_IGH6 ((uint8_t)0x21u) 00212 #define SBC_AOUT_IGH7 ((uint8_t)0x22u) 00213 #define SBC_AOUT_IGH8 ((uint8_t)0x23u) 00214 #define SBC_AOUT_IGL5 ((uint8_t)0x24u) 00215 #define SBC_AOUT_IGL6 ((uint8_t)0x25u) 00216 #define SBC_AOUT_IGL7 ((uint8_t)0x26u) 00217 #define SBC_AOUT_IGL8 ((uint8_t)0x27u) 00218 #define SBC_AOUT_ER3_DIV_10 ((uint8_t)0x28u) 00219 #define SBC_AOUT_ER4_DIV_10 ((uint8_t)0x29u) 00220 #define SBC_AOUT_IGH9 ((uint8_t)0x30u) 00221 #define SBC_AOUT_IGH10 ((uint8_t)0x31u) 00222 #define SBC_AOUT_IGH11 ((uint8_t)0x32u) 00223 #define SBC_AOUT_IGH12 ((uint8_t)0x33u) 00224 #define SBC_AOUT_IGL9 ((uint8_t)0x34u) 00225 #define SBC_AOUT_IGL10 ((uint8_t)0x35u) 00226 #define SBC_AOUT_IGL11 ((uint8_t)0x36u) 00227 #define SBC_AOUT_IGL12 ((uint8_t)0x37u) 00228 #define SBC_AOUT_ER5_DIV_10 ((uint8_t)0x38u) 00229 #define SBC_AOUT_ER6_DIV_10 ((uint8_t)0x39u) 00230 00231 /* Watch-dog messages */ 00232 #define SBC_WD_CHECKWORD_1 ((uint8_t)0x20) 00233 #define SBC_WD_CHECKWORD_2 ((uint8_t)0xFD) 00234 #define SBC_WD_CHECKWORD_3 ((uint8_t)0x8A) 00235 #define SBC_WD_CHECKWORD_4 ((uint8_t)0x57) 00236 #define SBC_WD_CHECKWORD_5 ((uint8_t)0xEC) 00237 #define SBC_WD_CHECKWORD_6 ((uint8_t)0x31) 00238 #define SBC_WD_CHECKWORD_7 ((uint8_t)0x46) 00239 #define SBC_WD_CHECKWORD_8 ((uint8_t)0x9B) 00240 #define SBC_WD_RESPONSE_1 ((uint8_t)0x19) 00241 #define SBC_WD_RESPONSE_2 ((uint8_t)0x6E) 00242 #define SBC_WD_RESPONSE_3 ((uint8_t)0xB3) 00243 #define SBC_WD_RESPONSE_4 ((uint8_t)0xC4) 00244 #define SBC_WD_RESPONSE_5 ((uint8_t)0x2A) 00245 #define SBC_WD_RESPONSE_6 ((uint8_t)0x5D) 00246 #define SBC_WD_RESPONSE_7 ((uint8_t)0x80) 00247 #define SBC_WD_RESPONSE_8 ((uint8_t)0xF7) 00248 00249 /* Error messages */ 00250 #define CG147_TRANSCIEVE_ERROR ((uint8_t)0x80u) 00251 #define CG147_PIT_CONFIG_ERROR ((uint8_t)0x40u) 00252 #define CG147_RESPONSE_PARITY_FAILURE ((uint8_t)0x01u) 00253 00254 /* Predefined sizes */ 00255 #define CG147_INPUT_BUFFER_SIZE ((uint8_t)30u) 00256 00257 /* Masks */ 00258 #define CG147_RESPONSE_STATUS_BYTE_MASK (0xFFu) 00259 #define CG147_ACCEL_STATUS_BYTE_MASK (0xE0u) 00260 #define CG147_ACCEL_READING_MASK (0x03u) 00261 #define CG147_UNLOCK_HS_LS (0x05u) 00262 #define CG147_ALL_AIRBAG_MASK (0xFFFu) 00263 00264 #define CG147_SQUIB_FIRE_OFFSET (1u) 00265 #define CG147_TEST_CMD_SIZE_FIRST_PART (2u) 00266 #define CG147_TEST_CMD_SIZE_SECOND_PART (N_ELEMENTS(cau8CG147TestCmds) \ 00267 - CG147_TEST_CMD_SIZE_FIRST_PART) 00268 /* Test modes */ 00269 #define CG147_TEST_IS_VER_ESR (0x03u) 00270 #define CG147_TEST_IS_VER_CAP (0x05u) 00271 #define CG147_TEST_IS_POL_PROT (0x09u) 00272 00273 /* ADC test Voltages */ 00274 #define SBC_AINADC_VAS_SET ((uint8_t)0x10u) 00275 #define SBC_AINADC_REF_BG ((uint8_t)0x11u) 00276 #define SBC_AINADC_REF_BG2 ((uint8_t)0x12u) 00277 #define SBC_AINADC_23REF_BG2 ((uint8_t)0x13u) 00278 #define SBC_AINADC_AGND ((uint8_t)0x14u) 00279 #define SBC_AINMUX_NO_SWITCHES ((uint8_t)0x0Fu) 00280 00281 /* MUX test channels */ 00282 #define SBC_AINMUX_VOLT (0x0Fu) 00283 #define SBC_AINMUX_AIN1 (0x00u) 00284 #define SBC_AINMUX_AIN2 (0x01u) 00285 #define SBC_AINMUX_AIN3 (0x02u) 00286 #define SBC_AINMUX_AIN4 (0x03u) 00287 #define SBC_AINMUX_AIN5 (0x04u) 00288 #define SBC_AINMUX_AIN6 (0x05u) 00289 #define SBC_AINMUX_AIO1 (0x06u) 00290 #define SBC_AINMUX_AIO2 (0x07u) 00291 00292 /* Number of ER channels */ 00293 #define CG147_N_ER_LINES (6u) 00294 00295 /* This define is used to set the default power setting in SBC_POWER_CTRL */ 00296 #define CG147_DEFAULT_POWER_STG 0x10u 00297 00298 /* Using SPI word transfers as timer */ 00299 #define CG147_SPI_FAKE_TIME_20US (uint16_t)((20/(3.93)) + 1u) 00300 #define CG147_SPI_FAKE_TIME_50US (uint16_t)((50/(3.93)) + 1u) 00301 00302 /* Timing elements */ 00303 #define CG147_TIME_DIVIDER (500000) 00304 #define CG147_PULSE_DELAY_40_USEC (PIT_1_SEC / CG147_TIME_DIVIDER), \ 00305 (uint16_t)(0.00004 * CG147_TIME_DIVIDER) 00306 #define CG147_PULSE_DELAY_20_USEC (PIT_1_SEC / CG147_TIME_DIVIDER), \ 00307 (uint16_t)(0.00002 * CG147_TIME_DIVIDER) 00308 #define CG147_WD2_COUNT_FOR_ISR ((uint16_t)SCHED_500US_PERIOD) 00309 #define CG147_WD3_COUNT_FOR_ISR ((uint8_t)180u) 00310 00311 #define SIGN_10_BITS ((uint16_t)BIT9) 00312 #define MAX_VALUE_10_BITS ((uint16_t)0x3FFu) 00313 00314 #define CG147_SAT_MASK_MAX ((uint16_t)BIT12) 00315 #define CG147_SAT_MASK_MIN ((uint16_t)BIT0) 00316 00317 #define CG147_LONG_TEST_WAIT_MS ((uint16_t)187u) 00318 00319 /*** Function Macros ***/ 00320 #ifndef N_ELEMENTS 00321 #define N_ELEMENTS(X) (sizeof(X)/sizeof(*(X))) 00322 #endif 00323 00324 #define CG147_AIRBAG_MASK(XX) XX 00325 /*** Enums ***/ 00326 00327 00328 /*** TypeDefs ***/ 00329 00330 /* 00331 ************************************************************** 00332 * Declarations 00333 **************************************************************/ 00334 /*** Extern ***/ 00335 extern const uint16_t cau16CG147InitCmdsArgs[]; 00336 extern const uint8_t cu8CG147InitCmdsArgsSize; 00337 extern const uint8_t cau8CG147InitCmdsIn16Bit[]; 00338 extern const uint8_t cau8CG147InitArgsIn16Bit[]; 00339 /*** Globals ***/ 00340 /* Following global variable is used by this driver to store whatever the */ 00341 /* CG147 is sending back */ 00342 extern uint16_t gau16CG147Responses[CG147_INPUT_BUFFER_SIZE]; 00343 extern uint8_t gau8CG147DSPIComplexInstances[]; 00344 extern uint8_t gu8CG147WatchDog2ResponseFromMCU; 00345 extern uint8_t gu8CG147WatchDog3ResponseFromMCU; 00346 extern uint32_t gu32CG147WatchDog2RequestToMCU; 00347 extern uint32_t gu32CG147WatchDog3RequestToMCU; 00348 extern uint16_t gu16CG147WatchDog2IsrCount; 00349 extern uint16_t gu16CG147WatchDog3IsrCount; 00350 00351 /*** Static Globals ***/ 00352 00353 /* 00354 ************************************************************** 00355 * Function Prototypes 00356 **************************************************************/ 00357 /************** Non-scheduler, 16-bit legacy fns follow ***************/ 00358 /* 00359 ****************************************************************************** 00360 * 00361 * Function: vfnCG147Init() 00362 * 00363 */ 00379 void vfnCG147Init(const uint8_t cu8DSPIMainInstance, 00380 const uint8_t cu8ChipSelect, 00381 const uint8_t cu8DSPISecondaryInstance1, 00382 const uint8_t cu8DSPISecondaryInstance2, 00383 const uint8_t cu8NSysResPort, 00384 const uint8_t cu8NSysResPin); 00385 /* 00386 ****************************************************************************** 00387 * 00388 * Function: vfnCG147ToggleResetPin() 00389 * 00390 */ 00400 void vfnCG147ToggleResetPin(const uint8_t cu8State, 00401 const uint8_t cu8NSysResPort, 00402 const uint8_t cu8NSysResPin); 00403 /* 00404 ****************************************************************************** 00405 * 00406 * Function: u8fnCG147ReadAOut() 00407 * 00408 */ 00427 uint8_t u8fnCG147ReadAOut(const uint8_t cu8DSPIInstance, 00428 const uint8_t cu8ChipSelect, 00429 const uint8_t cu8ADCInstance, 00430 const uint8_t cu8ADCCh, 00431 const uint8_t cu8CG147Ch, 00432 uint16_t* pu16Result); 00433 /* 00434 ****************************************************************************** 00435 * 00436 * Function: u8fnCG147ReadPSI5Accel() 00437 * 00438 */ 00452 uint8_t u8fnCG147ReadPSI5Accel(const uint8_t cu8DSPIInstance, 00453 const uint8_t cu8ChipSelect, 00454 uint16_t* pu16Accel); 00455 /* 00456 ****************************************************************************** 00457 * 00458 * Function: u8fnCG147ReadPSI5RegSensor() 00459 * 00460 */ 00474 uint8_t u8fnCG147ReadPSI5RegSensor(const uint8_t cu8DSPIInstance, \ 00475 const uint8_t cu8ChipSelect, \ 00476 uint16_t* pu16Accel); 00477 /* 00478 ****************************************************************************** 00479 * 00480 * Function: u8fnCG147Transcieve() 00481 * 00482 */ 00498 vuint8_t u8fnCG147Transcieve(uint8_t u8Cmd, uint8_t u8Value, 00499 uint8_t u8SPIInstance, uint8_t u8CSToCG147); 00500 /* 00501 ****************************************************************************** 00502 * 00503 * Function: u8fnCG147BatchTranscieve() 00504 * 00505 */ 00524 uint8_t u8fnCG147BatchTranscieve(uint8_t* pu8Cmd, uint8_t* pu8Value, 00525 uint8_t u8SPIInstance, uint8_t u8CSToCG147, 00526 uint8_t u8NOfMessages); 00527 /*********************** 16-bit scheduled fns follow **************************/ 00528 /* 00529 ****************************************************************************** 00530 * 00531 * Function: u8fnCG147ScheduleAOut() 00532 * 00533 */ 00549 uint8_t u8fnCG147ScheduleAOut(const uint8_t cu8DSPIInstance, 00550 const uint8_t cu8ChipSelect, 00551 const uint8_t cu8CG147Ch, uint16_t* pu16Status, 00552 uint32_t* pu32Time); 00553 /* 00554 ****************************************************************************** 00555 * 00556 * Function: u8fnCG147SchedulePSI5Accel() 00557 * 00558 */ 00572 uint8_t u8fnCG147SchedulePSI5Accel(const uint8_t cu8DSPIInstance, 00573 const uint8_t cu8ChipSelect, 00574 uint16_t* pu16Accel, uint32_t* pu32Time); 00575 /* 00576 ****************************************************************************** 00577 * 00578 * Function: u8fnCG147ScheduleTransfer() 00579 * 00580 */ 00599 uint8_t u8fnCG147ScheduleTransfer(uint8_t u8SPIInstance, 00600 uint8_t u8CSToCG147, 00601 uint8_t u8Cmd, uint8_t u8Value, 00602 uint16_t* pu16Response, 00603 uint32_t* pu32RequestTime); 00604 /* 00605 ****************************************************************************** 00606 * 00607 * Function: u8fnCG147ScheduleBatchTransfer() 00608 * 00609 */ 00630 uint8_t u8fnCG147ScheduleBatchTransfer(uint8_t u8SPIInstance, 00631 uint8_t u8CSToCG147, uint8_t* pu8Cmd, 00632 uint8_t* pu8Value, 00633 uint16_t* pu16Response, uint8_t u8Size, 00634 uint32_t* pu32RequestTime); 00635 /*********************** 17-bit scheduled fns follow **************************/ 00636 /* 00637 ****************************************************************************** 00638 * 00639 * Function: u8fnCG147ScheduleSafeAOut() 00640 * 00641 */ 00659 uint8_t u8fnCG147ScheduleSafeAOut(const uint8_t cu8DSPIInstance1, 00660 const uint8_t cu8DSPIInstance2, 00661 const uint8_t cu8ChipSelect, 00662 const uint8_t cu8CG147Ch, 00663 uint32_t* pu32Status, 00664 uint32_t* pu32Time); 00665 /* 00666 ****************************************************************************** 00667 * 00668 * Function: u8fnCG147ScheduleSafePSI5Accel() 00669 * 00670 */ 00689 uint8_t u8fnCG147ScheduleSafePSI5Accel(const uint8_t cu8DSPIInstance1, 00690 const uint8_t cu8DSPIInstance2, 00691 const uint8_t cu8ChipSelect, 00692 const uint16_t cu16ActiveChannels, 00693 uint32_t* pu32RawAccel, 00694 uint32_t* pu32Time); 00695 /* 00696 ****************************************************************************** 00697 * 00698 * Function: u8fnCG147ScheduleSafeSquibFireStart() 00699 * 00700 */ 00718 uint8_t u8fnCG147ScheduleSafeSquibFireStart(const uint8_t cu8DSPIInstance1, 00719 const uint8_t cu8DSPIInstance2, 00720 const uint8_t cu8ChipSelect, 00721 uint16_t u16ChannelMask, 00722 uint32_t* pu32Time); 00723 /* 00724 ****************************************************************************** 00725 * 00726 * Function: u8fnCG147ScheduleSafeSquibFireStop() 00727 * 00728 */ 00743 uint8_t u8fnCG147ScheduleSafeSquibFireStop(const uint8_t cu8DSPIInstance1, 00744 const uint8_t cu8DSPIInstance2, 00745 const uint8_t cu8ChipSelect, 00746 uint32_t* pu32Time); 00747 /* 00748 ****************************************************************************** 00749 * 00750 * Function: u8fnCG147ScheduleSafeTest() 00751 * 00752 */ 00782 uint8_t u8fnCG147ScheduleSafeTest(const uint8_t cu8DSPIInstance1, 00783 const uint8_t cu8DSPIInstance2, 00784 const uint8_t cu8ChipSelect, 00785 uint8_t u8TestCase, 00786 uint32_t* pu32Result, 00787 uint16_t* pu16ADCResponses, 00788 uint32_t* pu32Time); 00789 /* 00790 ****************************************************************************** 00791 * 00792 * Function: u8fnCG147ScheduleSafeTransfer() 00793 * 00794 */ 00824 uint8_t u8fnCG147ScheduleSafeTransfer(const uint8_t cu8SPIInstance1, 00825 const uint8_t cu8SPIInstance2, 00826 const uint8_t cu8CSToCG147, 00827 uint8_t u8Cmd, 00828 uint8_t u8Value, 00829 uint16_t* pu16Response, 00830 uint32_t* pu32RequestTime); 00831 /* 00832 ****************************************************************************** 00833 * 00834 * Function: u8fnCG147ScheduleSafeBatchTransfer() 00835 * 00836 */ 00871 uint8_t u8fnCG147ScheduleSafeBatchTransfer(const uint8_t cu8SPIInstance1, 00872 const uint8_t cu8SPIInstance2, 00873 const uint8_t cu8CSToCG147, 00874 uint8_t* pu8Cmd, 00875 uint8_t* pu8Value, 00876 uint16_t* pu16Response, 00877 uint8_t u8Size, 00878 uint32_t* pu32RequestTime); 00879 /* *************** fns independent of Transfer-mode follow *******************/ 00880 /* 00881 ****************************************************************************** 00882 * 00883 * Function: vfnCG147SyncPulse() 00884 * 00885 */ 00893 void vfnCG147SyncPulse(const uint8_t cu8NSyncPort, const uint8_t cu8NSyncPin); 00894 /* 00895 ****************************************************************************** 00896 * 00897 * Function: u8fnCG147WatchDogStartUp() 00898 * 00899 */ 00906 uint8_t u8fnCG147WatchDogStartUp(void); 00907 /* 00908 ****************************************************************************** 00909 * 00910 * Function: u8fnCG147WatchDogNextWord() 00911 * 00912 */ 00920 uint8_t u8fnCG147WatchDogNextWord(const uint8_t u8WordFromSBC); 00921 /* 00922 ****************************************************************************** 00923 * 00924 * Function: vfnCG147ComposeFrame() 00925 * 00926 */ 00939 void vfnCG147ComposeFrame(uint8_t* pu8Cmd, uint8_t* pu8Value, \ 00940 uint16_t* pu16ComposedMessage, uint8_t u8Size); 00941 /* ********************** Filter fns follow **********************************/ 00942 /* 00943 ****************************************************************************** 00944 * 00945 * Function: u16fnCG147ExtractScheduledPSI5Accel() 00946 * 00947 */ 00964 uint16_t u16fnCG147ExtractScheduledPSI5Accel(const uint32_t* pu32RawResponse, 00965 uint16_t* pu16Accel, 00966 const uint16_t u16ChannelsMask); 00967 /* 00968 ****************************************************************************** 00969 * 00970 * Function: u8fnCG147ExtractPSIAccel() 00971 * 00972 */ 00989 uint8_t u8fnCG147ExtractPSIAccel(const uint32_t* pu32RawResponse, 00990 uint16_t* pu16Accel); 00991 /* 00992 ****************************************************************************** 00993 * 00994 * Function: u8fnCG147ExtractResponse() 00995 * 00996 */ 01014 uint8_t u8fnCG147ExtractResponse(const uint32_t* pu32RawResponse, 01015 uint8_t* pu8Response); 01016 /* 01017 ****************************************************************************** 01018 * 01019 * Function: u8fnCG147VerifyParityFromSafeResult() 01020 * 01021 */ 01031 static uint8_t u8fnCG147VerifyParityFromSafeResult(uint32_t u32ComplexResponse); 01032 /* 01033 ****************************************************************************** 01034 * 01035 * Function: u16fn10BitOffsetFilter() 01036 * 01037 */ 01046 uint16_t u16fn10BitOffsetFilter(uint16_t u16RawValue); 01047 /* ************************* Isr fns follow **********************************/ 01048 /* 01049 ****************************************************************************** 01050 * 01051 * Function: vfnCG147WD2Isr() 01052 * 01053 */ 01061 void vfnCG147WD2Isr(void); 01062 /* 01063 ****************************************************************************** 01064 * 01065 * Function: vfnReScheduleWD() 01066 * 01067 */ 01074 void vfnReScheduleWD(void); 01075 /* 01076 ****************************************************************************** 01077 * 01078 * Function: vfnReScheduleWD3() 01079 * 01080 */ 01087 void vfnReScheduleWD3(void); 01088 01089 #endif /* _FILENAME_H */